Two-dimensional charge coupled device (CCD) arrays are widely used as optical image sensors, memories and processing devices in image and data processing systems. Charge transport is the mechanism employed to output stored data in all forms of CCD arrays and also to input data in corner-turn CCD memories, which have the capability of shifting charges on a parallel basis between columns to input data in the form of electrical signals, introduced into a bordering column, through the balance of the memory, as well as shifting data down rows to provide output. The bandwidth of a CCD array is limited by the time required to transfer charges into and out of each cell of the array. CCD devices are generally capable of transferring charges at a maximum rate of about 10 MHz. However, the limit on the charge transfer rate between elements within the array is not the most critical limiting factor in the bandwidth of a CCD array.
CCD arrays usually employ shift register type multiplexers for input or output purposes. As input devices, principally on corner-turn CCD arrays, the multiplexers accept a serial input data signal and when full feed it in parallel into connectors for the cells in a bordering column of the array. As output devices on all forms of CCD arrays, the multiplexers receive the parallel output from either bordering cells of the array, or in an interline transfer type array, from the outputs of vertical readout registers which are interlaced with each column of the photosensitive sites and serially read the signal out. In this interline transfer scheme after the photosensitive area has collected photoelectrons during an integration period, the charges in each column of cells are transferred in parallel to bordering column shift registers. The column shift registers are clocked out into the output multiplexer while the photosensitive area collects a new set of photoelectrons.
In this combined array/multiplexer architecture, the overall data rate of the device is usually limited by the rate at which the output multiplexer can clear the data rather than the intercell charge transfer rate. In prior art devices, multiplexers have been integrated with the arrays and accordingly subjected to the same basic intercell charge transfer rate limitation as the array. Thus, where an N row CCD array receives its input in parallel from a CCD shift register multiplexer or where an N column CCD array provides output through an integrated CCD shift register, the intercell clock rate is equal to the maximum charge transfer rate divided by N. Since typical intercell charge transfer rates of CCD devices are on the order of 10 MHz, the allowable clock speed in a 2-D CCD array serviced by a CCD multiplexer then becomes 10/N MHz, where N is the number of rows or columns connected to the multiplexer.
One solution to the problem is to divide up the input or output multiplexers into a number of shorter sections, each servicing a fraction of the rows or columns of the array and providing additional multiplexer devices, either integrated with the CCD structure or formed discretely, to feed an input serial data stream into the plurality of input multiplexers or to receive the outputs of the plurality of output multiplexers and convert those outputs into a serial data stream.
As fabrication techniques have been developed permitting larger CCD arrays, this speed limitation imposed by the maximum charge transfer rates within integrated input or output multiplexers has resulted in a difficult tradeoff between speed and complexity of input and/or output.
Another, independent factor in signal processing technology has been the development of acoustic charge transport (ACT) devices. Unlike the CCD devices, which are silicon based and employ sequential potential well differences to provided by applied voltages in electrodes to transfer charge, the ACT devices employ a surface acoustic wave (SAW) that is generated directly in the piezo-electric gallium arsenide substrate of an ACT. ACT devices are constructed as elongated channels and as the SAW propagates along the channel, it carries charges representing multiplexed samples of an input analog signal. As these charges pass taps spaced along the length of the ACT channel, they induce electric fields in the taps proportional to the instantaneous charge at that position. The taps may be digitally selected and the ACT devices are thus capable of acting as serial to parallel multiplexers. The ACT devices have bandwidth capabilities of up to 600 MHz.